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Now the full integrated PLL (phase locked loop) chip is used widely in radio frequency circuit.
全集成锁相环芯片目前在射频电路中应用很广泛。
The phase jitter of output signal of the PLL( phase locked loop) frequency doubler is analyzed.
定量分析了数字式锁相倍频器输出信号的相位抖动。
It also give an improved method for PLL (phase locked loop) to extract coherent carrier.
本文还对相干载波提取中的锁相环提出了一种改进方法。
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