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时序逻辑电路(Sequential Logic):如果一个逻 辑电路在任何时刻的稳定输出不仅取决于该时刻的输入, 而且与过去的输入相关的逻辑电路,则称之。
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sequential logic circuit [计] 时序逻辑电路 ; 时序电路
Sequential Logic Element 顺序逻辑组件 ; [自] 时序逻辑元件 ; 循序逻辑元素 ; 顺序逻辑元素
unclocked sequential logic 非时钟式序列逻辑
clocked sequential logic 时钟式序列逻辑
Sequential Logic Circuit Design 时序逻辑电路设计
Sequential Logic Design 时序逻辑设计
sequential logic control [计] 顺序逻辑控制
SEQUENTIAL LOGIC DESIGN PRACTICES 时序逻辑设计实践
Synchronous sequential logic 同步序向逻辑
Sequential logic
- abstract: In digital circuit theory, sequential logic is a type of logic circuit whose output depends not only on the present value of its input signals but on the past history of its inputs. This is in contrast to combinational logic, whose output is a function of only the present input.
以上来源于: WordNet
双语例句
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This experimental quide to the digital logic comprises two parts: combinational logic and sequential logic.
本实验指导书分为两大部分：组合逻辑，时序逻辑。
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The methods have useful reference value to using correctly flip-flops and designing sequential logic circuits.
这些方法对于正确使用触发器和设计时序逻辑电路有重要应用参考价值。
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In order to avoid clock skew familiar in high-speed sequential logic circuits, buffers are placed in clock-tree.
为了避免高速时序电路中常见的时钟偏差，在时钟树中放置了缓冲器。
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